diff options
| author | Tony Cheng <tony.cheng@amd.com> | 2019-03-22 14:22:07 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:09 -0500 |
| commit | b7d39c5878776cd936cf3d72f60e89dbd39dc56c (patch) | |
| tree | 1803a2154336e5e4bd6f2149dc32abb037e391ab /drivers/gpu/drm/amd | |
| parent | 0ff8dfe8f8f2387ed58f922f0653e531ec184ee4 (diff) | |
| download | linux-b7d39c5878776cd936cf3d72f60e89dbd39dc56c.tar.bz2 | |
drm/amd/display: move dsc clock from plane_resource to stream_resource
code restructure.
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/core_types.h | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index 33f1a1d972a9..aa04df64522f 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2204,7 +2204,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT - context->res_ctx.pipe_ctx[i].plane_res.bw.dscclk_khz = + context->res_ctx.pipe_ctx[i].stream_res.dscclk_khz = context->bw_ctx.dml.vba.DSCCLK_calculated[pipe_idx] * 1000; #endif context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest; diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index 2d551a6848f5..e94f3c180144 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -222,15 +222,14 @@ struct resource_pool { struct dcn_fe_bandwidth { int dppclk_khz; -#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT - int dscclk_khz; -#endif + }; struct stream_resource { struct output_pixel_processor *opp; #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT struct display_stream_compressor *dsc; + int dscclk_khz; #endif struct timing_generator *tg; struct stream_encoder *stream_enc; |