diff options
author | Kenneth Feng <kenneth.feng@amd.com> | 2018-04-20 13:55:39 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-15 13:43:35 -0500 |
commit | e0e93d03efa1c53012cc609fd48112df3e06da69 (patch) | |
tree | 37fca8101a3ccc1cbddd9172d268be4893165742 /drivers/gpu/drm/amd/powerplay | |
parent | b1f223c02a3a2b41847f48f75797eba5979ea25d (diff) | |
download | linux-e0e93d03efa1c53012cc609fd48112df3e06da69.tar.bz2 |
drm/amd/powerplay: add registry key to disable ACG
For the dummy ACG fuses,need to disable ACG, otherwise
corruption will be caused.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c index 7fa1ba89ac54..888ddca902d8 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c @@ -224,6 +224,11 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable ppsmc_pptable->AcgGfxclkSpreadPercent = smc_dpm_table.acggfxclkspreadpercent; ppsmc_pptable->AcgGfxclkSpreadFreq = smc_dpm_table.acggfxclkspreadfreq; + /* 0xFFFF will disable the ACG feature */ + if (!(hwmgr->feature_mask & PP_ACG_MASK)) { + ppsmc_pptable->AcgThresholdFreqHigh = 0xFFFF; + ppsmc_pptable->AcgThresholdFreqLow = 0xFFFF; + } return 0; } diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index 9b3dd7dce4e2..2f203ec3d19c 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -82,6 +82,7 @@ enum PP_FEATURE_MASK { PP_SOCCLK_DPM_MASK = 0x1000, PP_DCEFCLK_DPM_MASK = 0x2000, PP_OVERDRIVE_MASK = 0x4000, + PP_ACG_MASK = 0x10000, }; enum PHM_BackEnd_Magic { |