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author | Kevin Wang <kevin1.wang@amd.com> | 2019-05-10 15:29:11 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-21 18:59:30 -0500 |
commit | d5c316930fd5196a7263f2bd8b7daf9296ae520b (patch) | |
tree | b60faf1c73c4252c6469079d7d6bff6773ad2e4e /drivers/gpu/drm/amd/powerplay/navi10_ppt.c | |
parent | 564c4c7f00266a92fd3521983164b1014e6bc7e9 (diff) | |
download | linux-d5c316930fd5196a7263f2bd8b7daf9296ae520b.tar.bz2 |
drm/amd/powerplay: fix amdgpu_pm_info show gpu load error
due to the smu dma/RTOS restriction, the interval of catching smu
metric table should be more than 1ms. otherwise it will cause the gpu
activity data corruption.
Signed-off-by:Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/navi10_ppt.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index f9bfcaa73f7e..027742e17300 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -816,6 +816,8 @@ static int navi10_get_current_activity_percent(struct smu_context *smu, if (!value) return -EINVAL; + msleep(1); + ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, (void *)&metrics, false); if (ret) |