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| author | Kevin Wang <kevin1.wang@amd.com> | 2019-06-21 11:19:15 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-21 18:59:30 -0500 |
| commit | 6c6187ece013f220c7d29805f012cb88968ce880 (patch) | |
| tree | dbcaea34c40fb9191ac27a21f3f3c5fe515d01a7 /drivers/gpu/drm/amd/powerplay/navi10_ppt.c | |
| parent | 1316b713618cbbef3141c630bf47214bfe0d1b82 (diff) | |
| download | linux-6c6187ece013f220c7d29805f012cb88968ce880.tar.bz2 | |
drm/amd/powerplay: add function get_workload_type_map for swsmu
1.add new callback function get_workload_byte for smu
2.remove old workload map function
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/navi10_ppt.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index 18b2216fff08..7359c34d324c 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -194,6 +194,16 @@ static int navi10_pwr_src_map[SMU_POWER_SOURCE_COUNT] = { PWR_MAP(DC), }; +static int navi10_workload_map[] = { + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT, WORKLOAD_PPLIB_DEFAULT_BIT), + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_FULLSCREEN3D, WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT), + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_POWERSAVING, WORKLOAD_PPLIB_POWER_SAVING_BIT), + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VIDEO, WORKLOAD_PPLIB_VIDEO_BIT), + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VR, WORKLOAD_PPLIB_VR_BIT), + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE, WORKLOAD_PPLIB_CUSTOM_BIT), + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM, WORKLOAD_PPLIB_CUSTOM_BIT), +}; + static int navi10_get_smu_msg_index(struct smu_context *smc, uint32_t index) { int val; @@ -259,6 +269,18 @@ static int navi10_get_pwr_src_index(struct smu_context *smc, uint32_t index) return val; } + +static int navi10_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile) +{ + int val; + if (profile > PP_SMC_POWER_PROFILE_CUSTOM) + return -EINVAL; + + val = navi10_workload_map[profile]; + + return val; +} + static int navi10_get_allowed_feature_mask(struct smu_context *smu, uint32_t *feature_mask, uint32_t num) @@ -848,6 +870,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { .get_smu_feature_index = navi10_get_smu_feature_index, .get_smu_table_index = navi10_get_smu_table_index, .get_smu_power_index = navi10_get_pwr_src_index, + .get_workload_type = navi10_get_workload_type, .get_allowed_feature_mask = navi10_get_allowed_feature_mask, .set_default_dpm_table = navi10_set_default_dpm_table, .dpm_set_uvd_enable = navi10_dpm_set_uvd_enable, |