diff options
author | Evan Quan <evan.quan@amd.com> | 2020-07-06 16:11:31 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-21 15:37:37 -0400 |
commit | 6c339f37f1cd9b910f4c04b14079b1663b685c4d (patch) | |
tree | e1579aca1d6a73058bcce80f20362706ef97211e /drivers/gpu/drm/amd/powerplay/inc | |
parent | 22f2447c04728665a26c63981db05d901537b833 (diff) | |
download | linux-6c339f37f1cd9b910f4c04b14079b1663b685c4d.tar.bz2 |
drm/amd/powerplay: unify swSMU index to asic specific index mapping
By this we can drop redundant code.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 50 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 15 |
2 files changed, 50 insertions, 15 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 282df193f64e..663e00dbe04f 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -366,6 +366,17 @@ struct smu_umd_pstate_table { struct pstates_clk_freq dclk_pstate; }; +struct cmn2asic_msg_mapping { + int valid_mapping; + int map_to; + int valid_in_vf; +}; + +struct cmn2asic_mapping { + int valid_mapping; + int map_to; +}; + #define WORKLOAD_POLICY_MAX 7 struct smu_context { @@ -373,6 +384,12 @@ struct smu_context struct amdgpu_irq_src irq_source; const struct pptable_funcs *ppt_funcs; + const struct cmn2asic_msg_mapping *message_map; + const struct cmn2asic_mapping *clock_map; + const struct cmn2asic_mapping *feature_map; + const struct cmn2asic_mapping *table_map; + const struct cmn2asic_mapping *pwr_src_map; + const struct cmn2asic_mapping *workload_map; struct mutex mutex; struct mutex sensor_lock; struct mutex metrics_lock; @@ -604,6 +621,39 @@ typedef enum { METRICS_CURR_FANSPEED, } MetricsMember_t; +enum smu_cmn2asic_mapping_type { + CMN2ASIC_MAPPING_MSG, + CMN2ASIC_MAPPING_CLK, + CMN2ASIC_MAPPING_FEATURE, + CMN2ASIC_MAPPING_TABLE, + CMN2ASIC_MAPPING_PWR, + CMN2ASIC_MAPPING_WORKLOAD, +}; + +#define MSG_MAP(msg, index, valid_in_vf) \ + [SMU_MSG_##msg] = {1, (index), (valid_in_vf)} + +#define CLK_MAP(clk, index) \ + [SMU_##clk] = {1, (index)} + +#define FEA_MAP(fea) \ + [SMU_FEATURE_##fea##_BIT] = {1, FEATURE_##fea##_BIT} + +#define TAB_MAP(tab) \ + [SMU_TABLE_##tab] = {1, TABLE_##tab} + +#define TAB_MAP_VALID(tab) \ + [SMU_TABLE_##tab] = {1, TABLE_##tab} + +#define TAB_MAP_INVALID(tab) \ + [SMU_TABLE_##tab] = {0, TABLE_##tab} + +#define PWR_MAP(tab) \ + [SMU_POWER_SOURCE_##tab] = {1, POWER_SOURCE_##tab} + +#define WORKLOAD_MAP(profile, workload) \ + [profile] = {1, (workload)} + int smu_load_microcode(struct smu_context *smu); int smu_check_fw_status(struct smu_context *smu); diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h index f06158511f93..2b2da8fae1a7 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h @@ -52,21 +52,6 @@ #define MAX_DPM_LEVELS 16 #define MAX_PCIE_CONF 2 -#define CLK_MAP(clk, index) \ - [SMU_##clk] = {1, (index)} - -#define FEA_MAP(fea) \ - [SMU_FEATURE_##fea##_BIT] = {1, FEATURE_##fea##_BIT} - -#define TAB_MAP(tab) \ - [SMU_TABLE_##tab] = {1, TABLE_##tab} - -#define PWR_MAP(tab) \ - [SMU_POWER_SOURCE_##tab] = {1, POWER_SOURCE_##tab} - -#define WORKLOAD_MAP(profile, workload) \ - [profile] = {1, (workload)} - #define CTF_OFFSET_EDGE 5 #define CTF_OFFSET_HOTSPOT 5 #define CTF_OFFSET_MEM 5 |