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| author | yanyang1 <young.yang@amd.com> | 2015-08-18 15:28:32 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-21 16:42:15 -0500 |
| commit | c82baa28184356a75c0157129f88af42b2e7b695 (patch) | |
| tree | 7a702571d210aa8eb1ff04363ba8bcd4d5894a35 /drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | |
| parent | 1060029fae7c351351d7c2e9e345b6c57f515668 (diff) | |
| download | linux-c82baa28184356a75c0157129f88af42b2e7b695.tar.bz2 | |
drm/amd/powerplay: add Tonga dpm support (v3)
This implements DPM for tonga. DPM handles dynamic
clock and voltage scaling.
v2: merge all the patches related with tonga dpm
v3: merge dpm force level fix, cgs display fix, spelling fix
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index a69b3798e6ad..9795b9ad24c0 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -219,12 +219,12 @@ enum PHM_PerformanceLevelDesignation { typedef enum PHM_PerformanceLevelDesignation PHM_PerformanceLevelDesignation; struct PHM_PerformanceLevel { - uint32_t coreClock; - uint32_t memory_clock; - uint32_t vddc; - uint32_t vddci; - uint32_t nonLocalMemoryFreq; - uint32_t nonLocalMemoryWidth; + uint32_t coreClock; + uint32_t memory_clock; + uint32_t vddc; + uint32_t vddci; + uint32_t nonLocalMemoryFreq; + uint32_t nonLocalMemoryWidth; }; typedef struct PHM_PerformanceLevel PHM_PerformanceLevel; @@ -251,9 +251,9 @@ static inline bool phm_cap_enabled(const uint32_t *caps, enum phm_platform_caps #define PP_PCIEGenInvalid 0xffff enum PP_PCIEGen { - PP_PCIEGen1 = 0, /* PCIE 1.0 - Transfer rate of 2.5 GT/s */ - PP_PCIEGen2, /*PCIE 2.0 - Transfer rate of 5.0 GT/s */ - PP_PCIEGen3 /*PCIE 3.0 - Transfer rate of 8.0 GT/s */ + PP_PCIEGen1 = 0, /* PCIE 1.0 - Transfer rate of 2.5 GT/s */ + PP_PCIEGen2, /*PCIE 2.0 - Transfer rate of 5.0 GT/s */ + PP_PCIEGen3 /*PCIE 3.0 - Transfer rate of 8.0 GT/s */ }; typedef enum PP_PCIEGen PP_PCIEGen; |