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authorDave Airlie <airlied@redhat.com>2015-12-23 14:15:26 +1000
committerDave Airlie <airlied@redhat.com>2015-12-23 14:15:26 +1000
commitfd3e14ffbd9ec7593ba4dafc9452a91373a4df05 (patch)
tree2db6625f712787514208f794ac62d24f415771a4 /drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c
parent9116199536878bb2fdd63d6064633d6e3f2cba22 (diff)
parenteafbbd9883d0121811a9388988b80476dc12b1bf (diff)
downloadlinux-fd3e14ffbd9ec7593ba4dafc9452a91373a4df05.tar.bz2
Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next
[airlied: fixup build problems on arm - added errno.h include] * 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (152 commits) amd/powerplay: fix copy paste typo in hardwaremanager.c amd/powerplay: disable powerplay by default initially amd/powerplay: don't enable ucode fan control if vbios has no fan table drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2) drm/amd/powerplay: check whether need to enable thermal control. (v2) drm/amd/powerplay: add point check to avoid NULL point hang. drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock. drm/amd/powerplay: Don't return an error if fan table is missing drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init drm/powerplay: add debugging output to processpptables.c drm/powerplay: add debugging output to tonga_processpptables.c amd/powerplay: Add structures required to report configuration change amd/powerplay: Fix get dal power level amd\powerplay Implement get dal power level drm/amd/powerplay: display gpu load when print performance for tonga. drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late drm/amd/powerplay: move shared function of vi to hwmgr. (v2) drm/amd/powerplay: check whether enable dpm in powerplay. drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing. drm/amd/powerplay: fix boolreturn.cocci warnings ...
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c b/drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c
new file mode 100644
index 000000000000..186496a34cbe
--- /dev/null
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2015 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include <linux/types.h>
+#include "atom-types.h"
+#include "atombios.h"
+#include "pppcielanes.h"
+
+/** \file
+ * Functions related to PCIe lane changes.
+ */
+
+/* For converting from number of lanes to lane bits. */
+static const unsigned char pp_r600_encode_lanes[] = {
+ 0, /* 0 Not Supported */
+ 1, /* 1 Lane */
+ 2, /* 2 Lanes */
+ 0, /* 3 Not Supported */
+ 3, /* 4 Lanes */
+ 0, /* 5 Not Supported */
+ 0, /* 6 Not Supported */
+ 0, /* 7 Not Supported */
+ 4, /* 8 Lanes */
+ 0, /* 9 Not Supported */
+ 0, /* 10 Not Supported */
+ 0, /* 11 Not Supported */
+ 5, /* 12 Lanes (Not actually supported) */
+ 0, /* 13 Not Supported */
+ 0, /* 14 Not Supported */
+ 0, /* 15 Not Supported */
+ 6 /* 16 Lanes */
+};
+
+static const unsigned char pp_r600_decoded_lanes[8] = { 16, 1, 2, 4, 8, 12, 16, };
+
+uint8_t encode_pcie_lane_width(uint32_t num_lanes)
+{
+ return pp_r600_encode_lanes[num_lanes];
+}
+
+uint8_t decode_pcie_lane_width(uint32_t num_lanes)
+{
+ return pp_r600_decoded_lanes[num_lanes];
+}