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| author | Evan Quan <evan.quan@amd.com> | 2020-08-26 18:19:28 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-09-17 17:46:47 -0400 |
| commit | bb7257b5a8b0182019df3b9819417301978d7538 (patch) | |
| tree | 9938d8053a95febbe85952228d96af4e968ab041 /drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h | |
| parent | 665945eb49d559588633ca8653d4e9e437161df8 (diff) | |
| download | linux-bb7257b5a8b0182019df3b9819417301978d7538.tar.bz2 | |
drm/amd/pm: apply the CDR workarounds only with some specific UMC firmwares(V2)
And different workaround will be applied based on hybrid cdr bit.
V2: add pmfw version guard to make sure the new workaround applied only
with pmfw >= 42.53.0
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h index fc8594e9b2bd..26181b679098 100644 --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_ppsmc.h @@ -128,7 +128,9 @@ #define PPSMC_MSG_SetDriverDummyTableDramAddrHigh 0x4E #define PPSMC_MSG_SetDriverDummyTableDramAddrLow 0x4F -#define PPSMC_Message_Count 0x50 +#define PPSMC_MSG_GetUMCFWWA 0x50 + +#define PPSMC_Message_Count 0x51 typedef uint32_t PPSMC_Result; typedef uint32_t PPSMC_Msg; |