diff options
author | Evan Quan <evan.quan@amd.com> | 2020-11-19 17:30:43 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-12-23 15:07:03 -0500 |
commit | a2b6df4fd6e3c0ba088b00fc00579dac263b0a64 (patch) | |
tree | 71f738661834450053cdacec4dfd662610918b3f /drivers/gpu/drm/amd/pm/inc/smu_types.h | |
parent | 37a58f691551dfdff4f1035ee119c9ebdb9eb119 (diff) | |
download | linux-a2b6df4fd6e3c0ba088b00fc00579dac263b0a64.tar.bz2 |
drm/amd/pm: support overdrive vddgfx offset setting(V2)
This is supported by Sienna Cichlid, Navy Flounder and Dimgrey
Cavefish. For these ASICs, the target voltage calculation can be
illustrated by "voltage = voltage calculated from v/f curve +
overdrive vddgfx offset".
V2: limit the smu_version check for Sienna Cichlid only
Here are some sample usages about this new OD setting:
1. Check current vddgfx offset setting by
cat /sys/class/drm/card0/device/pp_od_clk_voltage
...
...
OD_VDDGFX_OFFSET:
0mV
...
...
2. Set new vddgfx offset by
echo "vo 10" > /sys/class/drm/card0/device/pp_od_clk_voltage
cat /sys/class/drm/card0/device/pp_od_clk_voltage
...
...
OD_VDDGFX_OFFSET:
10mV
...
...
3. Commit the new setting by
echo "c" > /sys/class/drm/card0/device/pp_od_clk_voltage
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/inc/smu_types.h')
-rw-r--r-- | drivers/gpu/drm/amd/pm/inc/smu_types.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h b/drivers/gpu/drm/amd/pm/inc/smu_types.h index b2d0d8fcf429..8e428c728e0e 100644 --- a/drivers/gpu/drm/amd/pm/inc/smu_types.h +++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h @@ -241,6 +241,7 @@ enum smu_clk_type { SMU_OD_MCLK, SMU_OD_VDDC_CURVE, SMU_OD_RANGE, + SMU_OD_VDDGFX_OFFSET, SMU_CLK_COUNT, }; |