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authorHuang Rui <ray.huang@amd.com>2019-01-14 15:24:59 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-03-19 15:03:58 -0500
commit04885368cbc85736d61b79c7624aeed238fde93b (patch)
tree6f4173aded9ec5086ded0944d9f69bfff81db8d1 /drivers/gpu/drm/amd/display
parent1e33d4d439491a3d179e0f574cfb9d1ab6a92dca (diff)
downloadlinux-04885368cbc85736d61b79c7624aeed238fde93b.tar.bz2
drm/amd/powerplay: add interface to request display clock voltage
This patch adds interface to request display clock voltage, display will use it to request current display clock voltage. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 15a94e55f30a..389118e3f527 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -476,6 +476,10 @@ bool dm_pp_apply_clock_for_voltage_request(
ret = adev->powerplay.pp_funcs->display_clock_voltage_request(
adev->powerplay.pp_handle,
&pp_clock_request);
+ else if (adev->smu.funcs &&
+ adev->smu.funcs->display_clock_voltage_request)
+ ret = smu_display_clock_voltage_request(&adev->smu,
+ &pp_clock_request);
if (ret)
return false;
return true;
@@ -512,16 +516,19 @@ void pp_rv_set_display_requirement(struct pp_smu *pp,
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
struct pp_display_clock_request clock = {0};
- if (!pp_funcs || !pp_funcs->display_clock_voltage_request)
- return;
-
clock.clock_type = amd_pp_dcf_clock;
clock.clock_freq_in_khz = req->hard_min_dcefclk_mhz * 1000;
- pp_funcs->display_clock_voltage_request(pp_handle, &clock);
+ if (pp_funcs && pp_funcs->display_clock_voltage_request)
+ pp_funcs->display_clock_voltage_request(pp_handle, &clock);
+ else if (adev->smu.funcs && adev->smu.funcs->display_clock_voltage_request)
+ smu_display_clock_voltage_request(&adev->smu, &clock);
clock.clock_type = amd_pp_f_clock;
clock.clock_freq_in_khz = req->hard_min_fclk_mhz * 1000;
- pp_funcs->display_clock_voltage_request(pp_handle, &clock);
+ if (pp_funcs && pp_funcs->display_clock_voltage_request)
+ pp_funcs->display_clock_voltage_request(pp_handle, &clock);
+ else if (adev->smu.funcs && adev->smu.funcs->display_clock_voltage_request)
+ smu_display_clock_voltage_request(&adev->smu, &clock);
}
void pp_rv_set_wm_ranges(struct pp_smu *pp,