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author | Harry Wentland <harry.wentland@amd.com> | 2019-02-25 13:26:34 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:07 -0500 |
commit | 97bda0322b8a91aa8d534763e709571b2334e585 (patch) | |
tree | 9e572c249b54a91c58a771d5eeef5ffc51cfe587 /drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h | |
parent | b4f199c7b00c87183f10c0a8f635f26ba2ede3eb (diff) | |
download | linux-97bda0322b8a91aa8d534763e709571b2334e585.tar.bz2 |
drm/amd/display: Add DSC support for Navi (v2)
Add support for DCN2 DSC (Display Stream Compression)
HW Blocks:
+--------++------+ +----------+
| HUBBUB || HUBP | <-- | MMHUBBUB |
+--------++------+ +----------+
| ^
v |
+--------+ +--------+
| DPP | | DWB |
+--------+ +--------+
|
v ^
+--------+ |
| MPC | |
+--------+ |
| |
v |
+-------+ +-------+ |
| OPP | <--> | DSC | |
+-------+ +-------+ |
| |
v |
+--------+ /
| OPTC | --------------
+--------+
|
v
+--------+ +--------+
| DIO | | DCCG |
+--------+ +--------+
v2: rebase (Alex)
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h index e8e521102adb..eced6ec05899 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h @@ -258,6 +258,12 @@ struct timing_generator_funcs { void (*set_vtg_params)(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing); #ifdef CONFIG_DRM_AMD_DC_DCN2_0 +#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT + void (*set_dsc_config)(struct timing_generator *optc, + enum optc_dsc_mode dsc_mode, + uint32_t dsc_bytes_per_pixel, + uint32_t dsc_slice_width); +#endif void (*set_odm_bypass)(struct timing_generator *tg, const struct dc_crtc_timing *dc_crtc_timing); void (*set_odm_combine)(struct timing_generator *tg, int combine_opp_id, int mpcc_hactive); void (*set_gsl)(struct timing_generator *optc, const struct gsl_params *params); |