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| author | Eric Huang <jinhuieric.huang@amd.com> | 2022-01-21 10:39:54 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-01-27 15:47:34 -0500 |
| commit | 1790b649b01ba7e44af7c08ffcfc0eaa9d4f5ac6 (patch) | |
| tree | ff60a802525568f679b1328f5ab6c775224ccd42 /drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c | |
| parent | 039cacd2393971fe11f855118eea6c83c8f506fa (diff) | |
| download | linux-1790b649b01ba7e44af7c08ffcfc0eaa9d4f5ac6.tar.bz2 | |
drm/amdkfd: enable heavy-weight TLB flush on Vega20
It is to meet the requirement for memory allocation
optimization on MI50.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c')
0 files changed, 0 insertions, 0 deletions