diff options
| author | Michael Strauss <michael.strauss@amd.com> | 2022-05-31 16:55:32 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-25 17:16:38 -0400 |
| commit | cb849b4dc73d414149fea96330cdf96a82919fc9 (patch) | |
| tree | 42ca8589315955c4a8d2e8d769ef05d0d565f4cd /drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h | |
| parent | 40b31e5355ba8c4f7e58f1c458bbe46763dca541 (diff) | |
| download | linux-cb849b4dc73d414149fea96330cdf96a82919fc9.tar.bz2 | |
drm/amd/display: Add pixel rate div calcs and programming
[WHY/HOW]
Need to calculate and set some pixel rate divisors on correct otg_inst
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h index dfdd0b792a52..be0f5e4d48e1 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h @@ -37,4 +37,6 @@ void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool po void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable); +unsigned int dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div); + #endif /* __DC_HWSS_DCN314_H__ */ |