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authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>2019-09-25 17:12:10 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-10-25 16:50:08 -0400
commit44ce0cd3b5147d12143d2f8bf34b161a72890ebd (patch)
tree8b6541f1863da2f110c1f53adaffb4ae2b6979c7 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
parente2e316d5d795f86acc02bf92e153551d263c1b82 (diff)
downloadlinux-44ce0cd3b5147d12143d2f8bf34b161a72890ebd.tar.bz2
drm/amd/display: move dispclk vco freq to clk mgr base
This value will be needed by dml and therefore should be externally accessible. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
index dccfe07832e3..fef473d68a4a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
@@ -95,6 +95,12 @@ struct display_stream_compressor *dcn20_dsc_create(
struct dc_context *ctx, uint32_t inst);
void dcn20_dsc_destroy(struct display_stream_compressor **dsc);
+void dcn20_patch_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st *bb);
+void dcn20_cap_soc_clocks(
+ struct _vcs_dpi_soc_bounding_box_st *bb,
+ struct pp_smu_nv_clock_table max_clocks);
+void dcn20_update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st *bb,
+ struct pp_smu_nv_clock_table *max_clocks, unsigned int *uclk_states, unsigned int num_states);
struct hubp *dcn20_hubp_create(
struct dc_context *ctx,
uint32_t inst);