diff options
| author | Noah Abradjian <noah.abradjian@amd.com> | 2019-12-17 15:49:14 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-01-16 14:13:53 -0500 |
| commit | c1e3417558beda21fd41ed870ca16b36a69188d5 (patch) | |
| tree | 5172d8d42dcbff9cb2e2da91f28644aa6f3625e9 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c | |
| parent | ec256f449c07b2498f624ec7b9ca41177c989d7c (diff) | |
| download | linux-c1e3417558beda21fd41ed870ca16b36a69188d5.tar.bz2 | |
drm/amd/display: Indirect reg read macro with shift and mask
[Why]
Recent double buffering changes for dcn2 use IX_REG_READ.
However, this macro returns the full register value, with the need to
manually shift and mask it to retrieve field data.
[How]
Create new IX_REG_GET macro that handles shift and mask.
Use this for double buffering reads instead of IX_REG_READ.
Signed-off-by: Noah Abradjian <noah.abradjian@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c index 4047d406a74c..8dc3d1f73984 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c @@ -176,12 +176,9 @@ static void program_gamut_remap( * currently. select the alternate set to double buffer * the update so gamut_remap is updated on frame boundary */ - cur_select = IX_REG_READ(CM_TEST_DEBUG_INDEX, CM_TEST_DEBUG_DATA, - CM_TEST_DEBUG_DATA_STATUS_IDX); - - /* IX_REG_READ reads whole reg, so isolate part we want [10..9] */ - cur_select = (cur_select >> CM_TEST_DEBUG_DATA_GAMUT_REMAP_MODE_SH) - & CM_TEST_DEBUG_DATA_GAMUT_REMAP_MODE_MASK; + IX_REG_GET(CM_TEST_DEBUG_INDEX, CM_TEST_DEBUG_DATA, + CM_TEST_DEBUG_DATA_STATUS_IDX, + CM_TEST_DEBUG_DATA_GAMUT_REMAP_MODE, &cur_select); /* value stored in dbg reg will be 1 greater than mode we want */ if (cur_select != DCN2_GAMUT_REMAP_COEF_A) @@ -275,12 +272,9 @@ void dpp2_program_input_csc( * currently. select the alternate set to double buffer * the CSC update so CSC is updated on frame boundary */ - cur_select = IX_REG_READ(CM_TEST_DEBUG_INDEX, CM_TEST_DEBUG_DATA, - CM_TEST_DEBUG_DATA_STATUS_IDX); - - /* IX_REG_READ reads whole reg, so isolate part we want [4..3] */ - cur_select = (cur_select >> CM_TEST_DEBUG_DATA_ICSC_MODE_SH) - & CM_TEST_DEBUG_DATA_ICSC_MODE_MASK; + IX_REG_GET(CM_TEST_DEBUG_INDEX, CM_TEST_DEBUG_DATA, + CM_TEST_DEBUG_DATA_STATUS_IDX, + CM_TEST_DEBUG_DATA_ICSC_MODE, &cur_select); if (cur_select != DCN2_ICSC_SELECT_ICSC_A) select = DCN2_ICSC_SELECT_ICSC_A; |