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| author | Roman Li <Roman.Li@amd.com> | 2020-09-29 11:21:58 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-10-05 15:15:56 -0400 |
| commit | 3a83e4e64bb1522ddac67ffc787d1c38291e1a65 (patch) | |
| tree | 907efd005ca3c474afd17acae74f53aec1a8836e /drivers/gpu/drm/amd/display/dc/dcn10 | |
| parent | ac0dc4c5a0760c9a9437d5864c277d9d2554a6ec (diff) | |
| download | linux-3a83e4e64bb1522ddac67ffc787d1c38291e1a65.tar.bz2 | |
drm/amd/display: Add dcn3.01 support to DC (v2)
Update dc for vangogh support.
v2: fix compilation without DCN 301 set.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h index 04dabed5f1c5..1ac734d0d5e8 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h @@ -449,14 +449,32 @@ struct dcn10_link_enc_registers { type AUX_RX_TIMEOUT_LEN;\ type AUX_RX_TIMEOUT_LEN_MUL +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + +#define DCN30_LINK_ENCODER_REG_FIELD_LIST(type) \ + type TMDS_SYNC_DCBAL_EN;\ + type PHY_HPO_DIG_SRC_SEL;\ + type PHY_HPO_ENC_SRC_SEL;\ + type DPCS_TX_HDMI_FRL_MODE;\ + type DPCS_TX_DATA_SWAP_10_BIT;\ + type DPCS_TX_DATA_ORDER_INVERT_18_BIT;\ + type RDPCS_TX_CLK_EN +#endif + struct dcn10_link_enc_shift { DCN_LINK_ENCODER_REG_FIELD_LIST(uint8_t); DCN20_LINK_ENCODER_REG_FIELD_LIST(uint8_t); +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + DCN30_LINK_ENCODER_REG_FIELD_LIST(uint8_t); +#endif }; struct dcn10_link_enc_mask { DCN_LINK_ENCODER_REG_FIELD_LIST(uint32_t); DCN20_LINK_ENCODER_REG_FIELD_LIST(uint32_t); +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + DCN30_LINK_ENCODER_REG_FIELD_LIST(uint32_t); +#endif }; struct dcn10_link_encoder { |