drm/amd/display: bandwidth update fix

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 5 insertions, 11 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
index c7a2b768bcd1..85a54d963f8d 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
@@ -106,23 +106,18 @@ static bool dce80_enable_display_power_gating(
 		return false;
 }
 
-
-static void set_display_mark_for_pipe_if_needed(struct core_dc *dc,
-		struct pipe_ctx *pipe_ctx,
-		struct validate_context *context)
-{
-	/* Do nothing until we have proper bandwitdth calcs */
-}
-
 static void set_displaymarks(
 		const struct core_dc *dc, struct validate_context *context)
 {
 	/* Do nothing until we have proper bandwitdth calcs */
 }
 
-static void set_bandwidth(struct core_dc *dc)
+static void set_bandwidth(
+		struct core_dc *dc,
+		struct validate_context *context,
+		bool decrease_allowed)
 {
-	/* Do nothing until we have proper bandwitdth calcs */
+	dc->hwss.set_displaymarks(dc, context);
 }
 
 
@@ -133,7 +128,6 @@ bool dce80_hw_sequencer_construct(struct core_dc *dc)
 	dc->hwss.enable_display_power_gating = dce80_enable_display_power_gating;
 	dc->hwss.pipe_control_lock = dce_pipe_control_lock;
 	dc->hwss.set_displaymarks = set_displaymarks;
-	dc->hwss.increase_watermarks_for_pipe = set_display_mark_for_pipe_if_needed;
 	dc->hwss.set_bandwidth = set_bandwidth;
 
 	return true;