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author | David Galiffi <David.Galiffi@amd.com> | 2019-05-30 11:56:39 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 14:18:08 -0500 |
commit | e0a6440a2961b1da3ea895b0bef082fc1a78e190 (patch) | |
tree | 0c7d6c90afda809d4ff1100d78068fee376ad531 /drivers/gpu/drm/amd/display/dc/dc_dp_types.h | |
parent | 93c25fbdc30a6058115e7a9f3fa161f5a26f7043 (diff) | |
download | linux-e0a6440a2961b1da3ea895b0bef082fc1a78e190.tar.bz2 |
drm/amd/display: Add ability to set preferred link training parameters.
[WHY]
To add support for OS requirement to set preferred link training
parameters.
[HOW]
Create new structure of dp link training overrides. During link training
processes, these values should be used instead of the default training
parameters.
Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_dp_types.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h index dfcec4d3e9c0..efa7a47f6b7e 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h @@ -90,6 +90,13 @@ enum dc_post_cursor2 { POST_CURSOR2_MAX_LEVEL = POST_CURSOR2_LEVEL3, }; +enum dc_dp_training_pattern { + DP_TRAINING_PATTERN_SEQUENCE_1 = 0, + DP_TRAINING_PATTERN_SEQUENCE_2, + DP_TRAINING_PATTERN_SEQUENCE_3, + DP_TRAINING_PATTERN_SEQUENCE_4, +}; + struct dc_link_settings { enum dc_lane_count lane_count; enum dc_link_rate link_rate; @@ -109,6 +116,20 @@ struct dc_link_training_settings { struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]; }; +struct dc_link_training_overrides { + enum dc_voltage_swing *voltage_swing; + enum dc_pre_emphasis *pre_emphasis; + enum dc_post_cursor2 *post_cursor2; + + uint16_t *cr_pattern_time; + uint16_t *eq_pattern_time; + enum dc_dp_training_pattern *pattern_for_eq; + + enum dc_link_spread *downspread; + bool *alternate_scrambler_reset; + bool *enhanced_framing; + bool *fec_enable; +}; union dpcd_rev { struct { |