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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2020-12-16 23:25:51 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2020-12-16 23:25:51 +0100 |
| commit | efd3043790c6e92f0bbe1fe385db9b544131c59c (patch) | |
| tree | 92f78b31d6ce26d0ba8a32a6b2c0edeae573abe4 /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | |
| parent | 02e66dd564229043c094ea951ed24df932d44644 (diff) | |
| parent | 6ae09fa49147e557eb6aebbb5b2059b63706d454 (diff) | |
| download | linux-efd3043790c6e92f0bbe1fe385db9b544131c59c.tar.bz2 | |
Merge tag 'amd-drm-fixes-5.11-2020-12-16' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-fixes-5.11-2020-12-16:
amdgpu:
- Fix a eDP regression for DCE asics
- SMU fixes for sienna cichlid
- Misc W=1 fixes
- SDMA 5.2 reset fix
- Suspend/resume fix
- Misc display fixes
- Misc runtime PM fixes and cleanups
- Dimgrey Cavefish fixes
- printk cleanup
- Documentation warning fixes
amdkfd:
- Error logging fix
- Fix pipe offset calculation
radeon:
- printk cleanup
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201216192421.18627-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c index ff6db26626ea..7b886a779a8c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c @@ -81,6 +81,14 @@ const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc, return pipe_crc_sources; } +static void amdgpu_dm_set_crc_window_default(struct dm_crtc_state *dm_crtc_state) +{ + dm_crtc_state->crc_window.x_start = 0; + dm_crtc_state->crc_window.y_start = 0; + dm_crtc_state->crc_window.x_end = 0; + dm_crtc_state->crc_window.y_end = 0; +} + bool amdgpu_dm_crc_window_is_default(struct dm_crtc_state *dm_crtc_state) { bool ret = true; @@ -141,7 +149,10 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, mutex_lock(&adev->dm.dc_lock); /* Enable CRTC CRC generation if necessary. */ - if (dm_is_crc_source_crtc(source)) { + if (dm_is_crc_source_crtc(source) || source == AMDGPU_DM_PIPE_CRC_SOURCE_NONE) { + if (!enable) + amdgpu_dm_set_crc_window_default(dm_crtc_state); + if (!amdgpu_dm_crc_window_is_default(dm_crtc_state)) { crc_window = &tmp_window; |