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| author | Hawking Zhang <Hawking.Zhang@amd.com> | 2022-07-02 10:20:03 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-08-30 16:37:14 -0400 |
| commit | f926464e59b7029b02d731a9f8a31419ff973ed3 (patch) | |
| tree | 32f2a4346020a2ec1f2ea4951545edb36595ea8f /drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | |
| parent | 5ddb5fe9e5a5c7f518a29df22c2f5af62cc74826 (diff) | |
| download | linux-f926464e59b7029b02d731a9f8a31419ff973ed3.tar.bz2 | |
drm/amdgpu: enable imu_rlc_ram programming for v11_0_3
All gc v11_0_3 registers in gcvml2 range have different
register offset from the ones in gc v11_0_0. v11_0_3
imu_rlc_ram programming has to be separated from v11_0_0
implementation
v2: fix checkpatch errors (Alex)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c')
0 files changed, 0 insertions, 0 deletions