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| author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2021-12-27 16:35:44 +0100 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2021-12-27 16:35:44 +0100 |
| commit | 3f0bb496ee41d0eb99d308768c9f8593cbd3eb9f (patch) | |
| tree | c56b697a7e818e91974d951872781bfd9b3af5b5 /drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | |
| parent | d7fbdc575b33c374ce88ccfe3ab364f7eb240f8a (diff) | |
| parent | 9c33eef84e3110963d6f41d87d63bc40d716eb1f (diff) | |
| download | linux-3f0bb496ee41d0eb99d308768c9f8593cbd3eb9f.tar.bz2 | |
Merge branches 'thermal-tools' and 'thermal-int340x'
Merge tmon fix and int340x driver improvement for 5.17-rc1.
* thermal-tools:
thermal: tools: tmon: remove unneeded local variable
* thermal-int340x:
thermal: int340x: Use struct_group() for memcpy() region
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index e7dfeb466a0e..dbe7442fb25c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -7707,8 +7707,19 @@ static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev) switch (adev->ip_versions[GC_HWIP][0]) { case IP_VERSION(10, 3, 1): case IP_VERSION(10, 3, 3): - clock = (uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Vangogh) | - ((uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh) << 32ULL); + preempt_disable(); + clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh); + clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Vangogh); + hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh); + /* The SMUIO TSC clock frequency is 100MHz, which sets 32-bit carry over + * roughly every 42 seconds. + */ + if (hi_check != clock_hi) { + clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Vangogh); + clock_hi = hi_check; + } + preempt_enable(); + clock = clock_lo | (clock_hi << 32ULL); break; default: preempt_disable(); |