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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2019-05-09 10:18:57 +0200
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2019-05-09 10:19:03 +0200
commit752c4f3c1d19708578257ecc041672b6d8afb9bf (patch)
tree75bf7773e3dcddb495540dbd3fd135702de738eb /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
parent3be2071004bf748ed39e54ccda85caaa774c7ccd (diff)
parenteb85d03e01c3e9f3b0ba7282b2e3515a635decb2 (diff)
downloadlinux-752c4f3c1d19708578257ecc041672b6d8afb9bf.tar.bz2
Merge remote-tracking branch 'drm/drm-next' into drm-misc-next
Requested for backmerging airlied's drm-legacy cleanup. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c51
1 files changed, 42 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 469cb6477b8e..22bd21efe6b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -530,6 +530,33 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
return 0;
}
+/* Only used in device probe stage and called only once. */
+int amdgpu_ras_feature_enable_on_boot(struct amdgpu_device *adev,
+ struct ras_common_if *head, bool enable)
+{
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+ int ret;
+
+ if (!con)
+ return -EINVAL;
+
+ if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS) {
+ /* If ras is enabled by vbios, we set up ras object first in
+ * both case. For enable, that is all what we need do. For
+ * disable, we need perform a ras TA disable cmd after that.
+ */
+ ret = __amdgpu_ras_feature_enable(adev, head, 1);
+ if (ret)
+ return ret;
+
+ if (!enable)
+ ret = amdgpu_ras_feature_enable(adev, head, 0);
+ } else
+ ret = amdgpu_ras_feature_enable(adev, head, enable);
+
+ return ret;
+}
+
static int amdgpu_ras_disable_all_features(struct amdgpu_device *adev,
bool bypass)
{
@@ -558,11 +585,13 @@ static int amdgpu_ras_enable_all_features(struct amdgpu_device *adev,
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
int ras_block_count = AMDGPU_RAS_BLOCK_COUNT;
int i;
+ const enum amdgpu_ras_error_type default_ras_type =
+ AMDGPU_RAS_ERROR__NONE;
for (i = 0; i < ras_block_count; i++) {
struct ras_common_if head = {
.block = i,
- .type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
+ .type = default_ras_type,
.sub_block_index = 0,
};
strcpy(head.name, ras_block_str(i));
@@ -1368,9 +1397,6 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
amdgpu_ras_mask &= AMDGPU_RAS_BLOCK_MASK;
- if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
- amdgpu_ras_enable_all_features(adev, 1);
-
if (amdgpu_ras_fs_init(adev))
goto fs_out;
@@ -1398,18 +1424,25 @@ void amdgpu_ras_post_init(struct amdgpu_device *adev)
if (!con)
return;
- /* We enable ras on all hw_supported block, but as boot parameter might
- * disable some of them and one or more IP has not implemented yet.
- * So we disable them on behalf.
- */
if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS) {
+ /* Set up all other IPs which are not implemented. There is a
+ * tricky thing that IP's actual ras error type should be
+ * MULTI_UNCORRECTABLE, but as driver does not handle it, so
+ * ERROR_NONE make sense anyway.
+ */
+ amdgpu_ras_enable_all_features(adev, 1);
+
+ /* We enable ras on all hw_supported block, but as boot
+ * parameter might disable some of them and one or more IP has
+ * not implemented yet. So we disable them on behalf.
+ */
list_for_each_entry_safe(obj, tmp, &con->head, node) {
if (!amdgpu_ras_is_supported(adev, obj->head.block)) {
amdgpu_ras_feature_enable(adev, &obj->head, 0);
/* there should be no any reference. */
WARN_ON(alive_obj(obj));
}
- };
+ }
}
}