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| author | Yifan Zha <Yifan.Zha@amd.com> | 2022-08-19 11:02:19 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-09-01 15:11:54 -0400 |
| commit | 828418259254863e0af5805bd712284e2bd88e3b (patch) | |
| tree | b50fd4834a034e8b2a0dfecc806237e64dceda60 /drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c | |
| parent | bbb860d46fcbde5881c93ed549445a85f2434a64 (diff) | |
| download | linux-828418259254863e0af5805bd712284e2bd88e3b.tar.bz2 | |
drm/admgpu: Skip CG/PG on SOC21 under SRIOV VF
[Why]
There is no CG(Clock Gating)/PG(Power Gating) requirement on SRIOV VF.
For multi VF, VF should not enable any CG/PG features.
For one VF, PF will program CG/PG related registers.
[How]
Do not set any cg/pg flag bit at early init under sriov.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c')
0 files changed, 0 insertions, 0 deletions