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| author | Alex Deucher <alexander.deucher@amd.com> | 2022-01-07 17:57:33 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-01-27 15:50:08 -0500 |
| commit | 8cda7a4f96e435be2fd074009d69521d973d7d31 (patch) | |
| tree | 6660912b8a60aa25565ff4e183a0140edf258c23 /drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | |
| parent | e281d5940ae7f2ceff99d5e001a69b5f0884d2f0 (diff) | |
| download | linux-8cda7a4f96e435be2fd074009d69521d973d7d31.tar.bz2 | |
drm/amdgpu/UAPI: add new CTX OP to get/set stable pstates
Add a new CTX ioctl operation to set stable pstates for profiling.
When creating traces for tools like RGP or using SPM or doing
performance profiling, it's required to enable a special
stable profiling power state on the GPU. These profiling
states set fixed clocks and disable certain other power
features like powergating which may impact the results.
Historically, these profiling pstates were enabled via sysfs,
but this adds an interface to enable it via the CTX ioctl
from the application. Since the power state is global
only one application can set it at a time, so if multiple
applications try and use it only the first will get it,
the ioctl will return -EBUSY for others. The sysfs interface
will override whatever has been set by this interface.
Mesa MR: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/207
v2: don't default r = 0;
v3: rebase on Evan's PM cleanup
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index a44b8b8ed39c..142f2f87d44c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -53,6 +53,7 @@ struct amdgpu_ctx { atomic_t guilty; unsigned long ras_counter_ce; unsigned long ras_counter_ue; + uint32_t stable_pstate; }; struct amdgpu_ctx_mgr { |