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| author | Haibo Chen <haibo.chen@nxp.com> | 2022-07-18 16:31:42 +0800 |
|---|---|---|
| committer | Bartosz Golaszewski <brgl@bgdev.pl> | 2022-07-19 11:19:16 +0200 |
| commit | 2abc17a93867dc816f0ed9d32021dda8078e7330 (patch) | |
| tree | 612b4e4f94c4bff67e4ad1b23326c8d3a1d491a0 /drivers/gpio/gpio-crystalcove.c | |
| parent | db8edaa09d7461ec08672a92a2eef63d5882bb79 (diff) | |
| download | linux-2abc17a93867dc816f0ed9d32021dda8078e7330.tar.bz2 | |
gpio: pca953x: use the correct range when do regmap sync
regmap will sync a range of registers, here use the correct range
to make sure the sync do not touch other unexpected registers.
Find on pca9557pw on imx8qxp/dxl evk board, this device support
8 pin, so only need one register(8 bits) to cover all the 8 pins's
property setting. But when sync the output, we find it actually
update two registers, output register and the following register.
Fixes: b76574300504 ("gpio: pca953x: Restore registers after suspend/resume cycle")
Fixes: ec82d1eba346 ("gpio: pca953x: Zap ad-hoc reg_output cache")
Fixes: 0f25fda840a9 ("gpio: pca953x: Zap ad-hoc reg_direction cache")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'drivers/gpio/gpio-crystalcove.c')
0 files changed, 0 insertions, 0 deletions