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| author | Han Xu <han.xu@nxp.com> | 2022-09-15 10:09:59 -0500 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-09-28 13:26:16 -0700 |
| commit | b1ff1bfe81e763420afd5f3f25f0b3cbfd97055c (patch) | |
| tree | 9999af6824df99e161fecbfe035dd9f178053632 /drivers/fpga/microchip-spi.c | |
| parent | 3d87f6c3be0df4a0f6d0ca719550a7bc77e520bf (diff) | |
| download | linux-b1ff1bfe81e763420afd5f3f25f0b3cbfd97055c.tar.bz2 | |
clk: imx: imx6sx: remove the SET_RATE_PARENT flag for QSPI clocks
There is no dedicate parent clock for QSPI so SET_RATE_PARENT flag
should not be used. For instance, the default parent clock for QSPI is
pll2_bus, which is also the parent clock for quite a few modules, such
as MMDC, once GPMI NAND set clock rate for EDO5 mode can cause system
hang due to pll2_bus rate changed.
Fixes: f1541e15e38e ("clk: imx6sx: Switch to clk_hw based API")
Signed-off-by: Han Xu <han.xu@nxp.com>
Link: https://lore.kernel.org/r/20220915150959.3646702-1-han.xu@nxp.com
Tested-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/fpga/microchip-spi.c')
0 files changed, 0 insertions, 0 deletions