diff options
| author | Ferry Toth <ftoth@exalondelft.nl> | 2021-05-18 23:27:09 +0200 |
|---|---|---|
| committer | Chanwoo Choi <cw00.choi@samsung.com> | 2021-06-21 18:28:00 +0900 |
| commit | ecb5bdff901139850fb3ca3ae2d0cccac045bc52 (patch) | |
| tree | 5902dfc08a61f4072a8b548055053e543b8b2128 /drivers/extcon | |
| parent | 009c9aa5be652675a06d5211e1640e02bbb1c33d (diff) | |
| download | linux-ecb5bdff901139850fb3ca3ae2d0cccac045bc52.tar.bz2 | |
extcon: intel-mrfld: Sync hardware and software state on init
extcon driver for Basin Cove PMIC shadows the switch status used for dwc3
DRD to detect a change in the switch position. This change initializes the
status at probe time.
Cc: stable@vger.kernel.org
Fixes: 492929c54791 ("extcon: mrfld: Introduce extcon driver for Basin Cove PMIC")
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Ferry Toth <ftoth@exalondelft.nl>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'drivers/extcon')
| -rw-r--r-- | drivers/extcon/extcon-intel-mrfld.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/extcon/extcon-intel-mrfld.c b/drivers/extcon/extcon-intel-mrfld.c index f47016fb28a8..cd1a5f230077 100644 --- a/drivers/extcon/extcon-intel-mrfld.c +++ b/drivers/extcon/extcon-intel-mrfld.c @@ -197,6 +197,7 @@ static int mrfld_extcon_probe(struct platform_device *pdev) struct intel_soc_pmic *pmic = dev_get_drvdata(dev->parent); struct regmap *regmap = pmic->regmap; struct mrfld_extcon_data *data; + unsigned int status; unsigned int id; int irq, ret; @@ -244,6 +245,14 @@ static int mrfld_extcon_probe(struct platform_device *pdev) /* Get initial state */ mrfld_extcon_role_detect(data); + /* + * Cached status value is used for cable detection, see comments + * in mrfld_extcon_cable_detect(), we need to sync cached value + * with a real state of the hardware. + */ + regmap_read(regmap, BCOVE_SCHGRIRQ1, &status); + data->status = status; + mrfld_extcon_clear(data, BCOVE_MIRQLVL1, BCOVE_LVL1_CHGR); mrfld_extcon_clear(data, BCOVE_MCHGRIRQ1, BCOVE_CHGRIRQ_ALL); |