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authorMatt Roper <matthew.d.roper@intel.com>2019-10-15 09:28:54 -0700
committerMatt Roper <matthew.d.roper@intel.com>2019-10-16 07:53:20 -0700
commit943682e3bd19385511171d730499120ab7245566 (patch)
tree95b726573d952e43d5735a31a21caba966347dd1 /drivers/eisa
parentfcb9bba47fb5ff39912f8f3b7b6d32992e461368 (diff)
downloadlinux-943682e3bd19385511171d730499120ab7245566.tar.bz2
drm/i915: Introduce Jasper Lake PCH
The Jasper Lake PCH follows ICP/TGP's south display behavior and is identical to MCC graphics-wise except that it does not use the unusual (port C -> TC1) pin mapping that MCC does. Also, it turns out the extra PCH ID that we had previously thought was a form of MCC is actually a second ID for JSP (i.e., port C uses the port C pins instead of the TC1 pins). v2: - Also update the port masks (not just the pin table) in mcc_hpd_irq_setup. (Vivek) v3: - Break jsp_hpd_irq_setup out into its own function for clarity. (Vivek) Cc: José Roberto de Souza <jose.souza@intel.com> Cc: James Ausmus <james.ausmus@intel.com> Cc: Vivek Kasireddy <vivek.kasireddy@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Vivek Kasireddy <vivek.kasireddy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191015162854.30546-1-matthew.d.roper@intel.com
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