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authorRyder Lee <ryder.lee@mediatek.com>2017-03-09 10:11:13 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2017-03-16 17:58:52 +0800
commitb7a2be388b5574428170e1a22f800f1d71cbfd64 (patch)
tree83cbe0c04b4c30e4a78a68d262bacf049272514d /drivers/crypto/mediatek/mtk-aes.c
parent132c57caefeddde914350d42bb6e3b5a3688faa5 (diff)
downloadlinux-b7a2be388b5574428170e1a22f800f1d71cbfd64.tar.bz2
crypto: mediatek - add MTK_* prefix and correct annotations.
Dummy patch to add MTK_* prefix to ring enum and fix incorrect annotations. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/mediatek/mtk-aes.c')
-rw-r--r--drivers/crypto/mediatek/mtk-aes.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/crypto/mediatek/mtk-aes.c b/drivers/crypto/mediatek/mtk-aes.c
index e67881f7430a..b57b68f2ac93 100644
--- a/drivers/crypto/mediatek/mtk-aes.c
+++ b/drivers/crypto/mediatek/mtk-aes.c
@@ -1152,8 +1152,8 @@ static int mtk_aes_record_init(struct mtk_cryp *cryp)
}
/* Link to ring0 and ring1 respectively */
- aes[0]->id = RING0;
- aes[1]->id = RING1;
+ aes[0]->id = MTK_RING0;
+ aes[1]->id = MTK_RING1;
return 0;
@@ -1221,14 +1221,14 @@ int mtk_cipher_alg_register(struct mtk_cryp *cryp)
if (ret)
goto err_record;
- ret = devm_request_irq(cryp->dev, cryp->irq[RING0], mtk_aes_irq,
+ ret = devm_request_irq(cryp->dev, cryp->irq[MTK_RING0], mtk_aes_irq,
0, "mtk-aes", cryp->aes[0]);
if (ret) {
dev_err(cryp->dev, "unable to request AES irq.\n");
goto err_res;
}
- ret = devm_request_irq(cryp->dev, cryp->irq[RING1], mtk_aes_irq,
+ ret = devm_request_irq(cryp->dev, cryp->irq[MTK_RING1], mtk_aes_irq,
0, "mtk-aes", cryp->aes[1]);
if (ret) {
dev_err(cryp->dev, "unable to request AES irq.\n");
@@ -1236,8 +1236,8 @@ int mtk_cipher_alg_register(struct mtk_cryp *cryp)
}
/* Enable ring0 and ring1 interrupt */
- mtk_aes_write(cryp, AIC_ENABLE_SET(RING0), MTK_IRQ_RDR0);
- mtk_aes_write(cryp, AIC_ENABLE_SET(RING1), MTK_IRQ_RDR1);
+ mtk_aes_write(cryp, AIC_ENABLE_SET(MTK_RING0), MTK_IRQ_RDR0);
+ mtk_aes_write(cryp, AIC_ENABLE_SET(MTK_RING1), MTK_IRQ_RDR1);
spin_lock(&mtk_aes.lock);
list_add_tail(&cryp->aes_list, &mtk_aes.dev_list);