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| author | Thomas Gleixner <tglx@linutronix.de> | 2022-10-04 11:22:43 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2022-10-04 11:22:43 +0200 |
| commit | 6cb5ce13357de06d376d300778eee2009f53d8cb (patch) | |
| tree | b12c8c4129ae8e062980a969a4114fad774ae0f9 /drivers/clocksource/arm_arch_timer.c | |
| parent | cceeeb6a6d02e7b9a74ddd27a3225013b34174aa (diff) | |
| parent | af246cc6d0ed11318223606128bb0b09866c4c08 (diff) | |
| download | linux-6cb5ce13357de06d376d300778eee2009f53d8cb.tar.bz2 | |
Merge tag 'timers-v6.1-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clocksource/event updates from Daniel Lezcano:
- Added DT bindings for Mediatek MT8188 (Johnson Wang)
- Added DT bindings for Renesas r8a779f0 (Wolfram Sang)
- Added support for RZ/V2L SoC (Lad Prabhakar)
- Rename TIMER_IRQ_EN to TIMER_IRQ_CLEAR to prevent confusion on sun4i
(Victor Hassan)
- Added support for Exynos ARTPEC-8 MCT, including DT bindings
(Vincent Whitchurch)
- Fixed handling of ARM erratum 858921 on the ARM Arch timer (Kunkun
Jiang)
- Added missing call platform_device_put() in the error path on ther
GXP timer (Lin Yujun)
- Cleaned the timer TI DM driver by self-encapsulating the code,
dropping dead code and simplifying some functions (Tony Lindgren)
- Added a DT property to tell the driver the clock is no longer
divided on recent NXP hardware (Peng Fan)
- Fixed the CNTPCT_LO and CNTVCT_LO values in the ARM arch timer (Yang
Guo)
Link: https://lore.kernel.org/r/b28ac4b0-5745-b3a9-b7e7-cc86dcb1b023@linaro.org
Diffstat (limited to 'drivers/clocksource/arm_arch_timer.c')
| -rw-r--r-- | drivers/clocksource/arm_arch_timer.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 9ab8221ee3c6..a7ff77550e17 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -44,8 +44,8 @@ #define CNTACR_RWVT BIT(4) #define CNTACR_RWPT BIT(5) -#define CNTVCT_LO 0x00 -#define CNTPCT_LO 0x08 +#define CNTPCT_LO 0x00 +#define CNTVCT_LO 0x08 #define CNTFRQ 0x10 #define CNTP_CVAL_LO 0x20 #define CNTP_CTL 0x2c @@ -473,6 +473,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = { .desc = "ARM erratum 858921", .read_cntpct_el0 = arm64_858921_read_cntpct_el0, .read_cntvct_el0 = arm64_858921_read_cntvct_el0, + .set_next_event_phys = erratum_set_next_event_phys, + .set_next_event_virt = erratum_set_next_event_virt, }, #endif #ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1 |