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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-10-17 12:00:33 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-12-04 10:30:16 +0100
commitc0f8584f0553f3e7b37270d203b3ad8fc7bd1262 (patch)
treeb352fb1e5020aaf37c962c41625ab4e1bc11008c /drivers/clk
parent6155bfa32caf1fe7528f24030cfbe5c744d7355e (diff)
downloadlinux-c0f8584f0553f3e7b37270d203b3ad8fc7bd1262.tar.bz2
clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
116/6 can be simplified to 58/3. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/renesas/r8a77995-cpg-mssr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index b9745665731f..eee3874865a9 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -191,14 +191,14 @@ static const unsigned int r8a77995_crit_mod_clks[] __initconst = {
* MD19 EXTAL (MHz) PLL0 PLL1 PLL3
*--------------------------------------------------------------------
* 0 48 x 1 x250/4 x100/3 x100/3
- * 1 48 x 1 x250/4 x100/3 x116/6
+ * 1 48 x 1 x250/4 x100/3 x58/3
*/
#define CPG_PLL_CONFIG_INDEX(md) (((md) & BIT(19)) >> 19)
static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] __initconst = {
/* EXTAL div PLL1 mult/div PLL3 mult/div */
{ 1, 100, 3, 100, 3, },
- { 1, 100, 3, 116, 6, },
+ { 1, 100, 3, 58, 3, },
};
static int __init r8a77995_cpg_mssr_init(struct device *dev)