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| author | Stephen Boyd <sboyd@kernel.org> | 2021-09-28 15:16:48 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-09-28 15:17:11 -0700 |
| commit | 4b65021a63a21791790960001b79dc5fd4af9ced (patch) | |
| tree | ca0b62c2afd410abddc78811e84ae5992a98f7b7 /drivers/clk | |
| parent | 09540fa337196be20e9f0241652364f09275d374 (diff) | |
| parent | fa2a30f8e0aa9304919750b116a9e9e322465299 (diff) | |
| download | linux-4b65021a63a21791790960001b79dc5fd4af9ced.tar.bz2 | |
Merge tag 'renesas-clk-for-v5.15-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-fixes
Pull Renesas clk driver fixes from Geert Uytterhoeven:
- Fix inverted logic in RZ/G2L .is_enabled() function
* tag 'renesas-clk-for-v5.15-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rzg2l: Fix clk status function
clk: renesas: r9a07g044: Mark IA55_CLK and DMAC_ACLK critical
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/renesas/r9a07g044-cpg.c | 2 | ||||
| -rw-r--r-- | drivers/clk/renesas/rzg2l-cpg.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c index 4c94b94c4125..1490446985e2 100644 --- a/drivers/clk/renesas/r9a07g044-cpg.c +++ b/drivers/clk/renesas/r9a07g044-cpg.c @@ -186,6 +186,8 @@ static struct rzg2l_reset r9a07g044_resets[] = { static const unsigned int r9a07g044_crit_mod_clks[] __initconst = { MOD_CLK_BASE + R9A07G044_GIC600_GICCLK, + MOD_CLK_BASE + R9A07G044_IA55_CLK, + MOD_CLK_BASE + R9A07G044_DMAC_ACLK, }; const struct rzg2l_cpg_info r9a07g044_cpg_info = { diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index 3b3b2c3347f3..761922ea5db7 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -391,7 +391,7 @@ static int rzg2l_mod_clock_is_enabled(struct clk_hw *hw) value = readl(priv->base + CLK_MON_R(clock->off)); - return !(value & bitmask); + return value & bitmask; } static const struct clk_ops rzg2l_mod_clock_ops = { |