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author | Alberto Panizzo <alberto@amarulasolutions.com> | 2018-07-06 15:18:51 +0200 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2018-07-08 00:19:19 +0200 |
commit | a64ad008980c65d38e6cf6858429c78e6b740c41 (patch) | |
tree | 2a01e321c68fceb9992be82b9efb1bf767d84c99 /drivers/clk/zynq | |
parent | 243229b11121fbc90d9ee875292dfc75ecf53040 (diff) | |
download | linux-a64ad008980c65d38e6cf6858429c78e6b740c41.tar.bz2 |
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
Register, shift and mask were wrong according to datasheet.
Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Cc: stable@vger.kernel.org
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/zynq')
0 files changed, 0 insertions, 0 deletions