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authorSowjanya Komatineni <skomatineni@nvidia.com>2019-08-16 12:41:54 -0700
committerThierry Reding <treding@nvidia.com>2019-11-11 14:53:03 +0100
commit68a14a5634dacb37d18618d62f0410f1ec69ab28 (patch)
tree2b61253f1544ba705f9830832540e212045b1e6e /drivers/clk/ux500
parent2b8cfd6b52cbf951d9b90862d95b8473d34d02ee (diff)
downloadlinux-68a14a5634dacb37d18618d62f0410f1ec69ab28.tar.bz2
clk: tegra: clk-super: Fix to enable PLLP branches to CPU
This patch has a fix to enable PLLP branches to CPU before changing the CPU cluster clock source to PLLP for Gen5 Super clock and disables PLLP branches to CPU when not in use. During system suspend entry and exit, CPU source will be switched to PLLP and this needs PLLP branches to be enabled to CPU prior to the switch. On system resume, warmboot code enables PLLP branches to CPU and powers up the CPU with PLLP clock source. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/ux500')
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