diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2017-05-19 15:06:08 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-06-07 15:32:15 +0200 |
| commit | 13e0dde8b2ed043aa3e65437342d501715d975c1 (patch) | |
| tree | ebc8e171a82bb4743fbcc27de067fcf79a261046 /drivers/clk/sunxi-ng/ccu_mux.c | |
| parent | 11ad470c5486ab848f04418c56d58f078ad53a9a (diff) | |
| download | linux-13e0dde8b2ed043aa3e65437342d501715d975c1.tar.bz2 | |
clk: sunxi-ng: Support multiple variable pre-dividers
On the A83T, the AHB1 clock has a shared pre-divider on the two
PLL-PERIPH clock parents. To support such instances of shared
pre-dividers, this patch extends the mux clock type to support
multiple variable pre-dividers.
As the pre-dividers are only used to calculate the rate, but
do not participate in the factorization process, this is fairly
straightforward.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_mux.c')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu_mux.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c index 748b172f9193..cfe4538304fb 100644 --- a/drivers/clk/sunxi-ng/ccu_mux.c +++ b/drivers/clk/sunxi-ng/ccu_mux.c @@ -44,14 +44,18 @@ static u16 ccu_mux_get_prediv(struct ccu_common *common, prediv = cm->fixed_predivs[i].div; } - if (common->features & CCU_FEATURE_VARIABLE_PREDIV) - if (parent_index == cm->variable_prediv.index) { - u8 div; + if (common->features & CCU_FEATURE_VARIABLE_PREDIV) { + int i; - div = reg >> cm->variable_prediv.shift; - div &= (1 << cm->variable_prediv.width) - 1; - prediv = div + 1; - } + for (i = 0; i < cm->n_var_predivs; i++) + if (parent_index == cm->var_predivs[i].index) { + u8 div; + + div = reg >> cm->var_predivs[i].shift; + div &= (1 << cm->var_predivs[i].width) - 1; + prediv = div + 1; + } + } return prediv; } |