diff options
| author | Sam Protsenko <semen.protsenko@linaro.org> | 2022-08-09 14:33:18 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-08-23 10:14:15 +0300 |
| commit | dbaa27cc7e62d87d46014ef314811eb00fad9bda (patch) | |
| tree | 167f8ae9767aba4cf7665cbdfee2cfe8f3f8af8e /drivers/clk/samsung | |
| parent | 65522e7d86c986df77bd3106de1ef7712070ee7e (diff) | |
| download | linux-dbaa27cc7e62d87d46014ef314811eb00fad9bda.tar.bz2 | |
clk: samsung: exynos850: Style fixes
Fix some typos in comments and do small coding style improvements.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-5-semen.protsenko@linaro.org
Diffstat (limited to 'drivers/clk/samsung')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos850.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/clk/samsung/clk-exynos850.c b/drivers/clk/samsung/clk-exynos850.c index cd9725f1dbf7..ef32546d3090 100644 --- a/drivers/clk/samsung/clk-exynos850.c +++ b/drivers/clk/samsung/clk-exynos850.c @@ -173,7 +173,6 @@ PNAME(mout_peri_uart_p) = { "oscclk", "dout_shared0_div4", "dout_shared1_div4", "oscclk" }; PNAME(mout_peri_ip_p) = { "oscclk", "dout_shared0_div4", "dout_shared1_div4", "oscclk" }; - /* List of parent clocks for Muxes in CMU_TOP: for CMU_DPU */ PNAME(mout_dpu_p) = { "dout_shared0_div3", "dout_shared1_div3", "dout_shared0_div4", "dout_shared1_div4" }; @@ -599,7 +598,7 @@ static const unsigned long hsi_clk_regs[] __initconst = { CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY, }; -/* List of parent clocks for Muxes in CMU_PERI */ +/* List of parent clocks for Muxes in CMU_HSI */ PNAME(mout_hsi_bus_user_p) = { "oscclk", "dout_hsi_bus" }; PNAME(mout_hsi_mmc_card_user_p) = { "oscclk", "dout_hsi_mmc_card" }; PNAME(mout_hsi_usb20drd_user_p) = { "oscclk", "dout_hsi_usb20drd" }; @@ -963,7 +962,7 @@ static const unsigned long dpu_clk_regs[] __initconst = { CLK_CON_GAT_GOUT_DPU_SYSREG_PCLK, }; -/* List of parent clocks for Muxes in CMU_CORE */ +/* List of parent clocks for Muxes in CMU_DPU */ PNAME(mout_dpu_user_p) = { "oscclk", "dout_dpu" }; static const struct samsung_mux_clock dpu_mux_clks[] __initconst = { |