diff options
| author | Will McVicker <willmcvicker@google.com> | 2021-10-14 19:53:45 +0000 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2021-10-15 16:00:03 +0200 |
| commit | 3270ffe89fe61490b28419cd474b6f12a5e63d65 (patch) | |
| tree | 4b131a0de7e6826a25722ee6c967ce39efacf4fa /drivers/clk/samsung/clk-cpu.c | |
| parent | 7dd05578198be9e08f3a019dd8b31873fddf51e3 (diff) | |
| download | linux-3270ffe89fe61490b28419cd474b6f12a5e63d65.tar.bz2 | |
clk: samsung: add support for CPU clocks
Adds 'struct samsung_cpu_clock' and corresponding CPU clock registration
function to the samsung common clk driver. This allows samsung clock
drivers to register their CPU clocks with the samsung_cmu_register_one()
API.
Currently the exynos5433 apollo and atlas clks have their own custom
init functions to handle registering their CPU clocks. With this patch
we can drop their custom CLK_OF_DECLARE functions and directly call
samsung_cmu_register_one().
Signed-off-by: Will McVicker <willmcvicker@google.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211014195347.3635601-2-willmcvicker@google.com
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk/samsung/clk-cpu.c')
| -rw-r--r-- | drivers/clk/samsung/clk-cpu.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index 00ef4d1b0888..7f20d9aedaa9 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -469,3 +469,21 @@ free_cpuclk: kfree(cpuclk); return ret; } + +void __init samsung_clk_register_cpu(struct samsung_clk_provider *ctx, + const struct samsung_cpu_clock *list, unsigned int nr_clk) +{ + unsigned int idx; + unsigned int num_cfgs; + struct clk_hw **hws = ctx->clk_data.hws; + + for (idx = 0; idx < nr_clk; idx++, list++) { + /* find count of configuration rates in cfg */ + for (num_cfgs = 0; list->cfg[num_cfgs].prate != 0; ) + num_cfgs++; + + exynos_register_cpu_clock(ctx, list->id, list->name, hws[list->parent_id], + hws[list->alt_parent_id], list->offset, list->cfg, num_cfgs, + list->flags); + } +} |