diff options
| author | Phil Edworthy <phil.edworthy@renesas.com> | 2022-05-03 12:55:53 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-05 12:12:33 +0200 |
| commit | 63804400f2a5ababe596b4ec908321d6b54f45aa (patch) | |
| tree | 32cb17c6f483ef041f27e3df15f652b0f692c13e /drivers/clk/renesas/r9a07g043-cpg.c | |
| parent | 75b0ad42ccd9a87873e91598116471d9991b09ea (diff) | |
| download | linux-63804400f2a5ababe596b4ec908321d6b54f45aa.tar.bz2 | |
clk: renesas: rzg2l: Make use of CLK_MON registers optional
The RZ/V2M SoC doesn't use CLK_MON registers, so make them optional.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220503115557.53370-9-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/r9a07g043-cpg.c')
| -rw-r--r-- | drivers/clk/renesas/r9a07g043-cpg.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r9a07g043-cpg.c b/drivers/clk/renesas/r9a07g043-cpg.c index 53a58034bef4..33c2bd8df2e5 100644 --- a/drivers/clk/renesas/r9a07g043-cpg.c +++ b/drivers/clk/renesas/r9a07g043-cpg.c @@ -315,4 +315,6 @@ const struct rzg2l_cpg_info r9a07g043_cpg_info = { /* Resets */ .resets = r9a07g043_resets, .num_resets = R9A07G043_TSU_PRESETN + 1, /* Last reset ID + 1 */ + + .has_clk_mon_regs = true, }; |