diff options
| author | Stephen Boyd <sboyd@kernel.org> | 2018-11-30 11:05:35 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-10 14:43:04 -0800 |
| commit | ddbae6658d4dc495ac62f7977062b33bb15d1af6 (patch) | |
| tree | 8a90d9c53c970cf425043cd104f4849254a5e9be /drivers/clk/renesas/r9a06g032-clocks.c | |
| parent | 651022382c7f8da46cb4872a545ee1da6d097d2a (diff) | |
| download | linux-ddbae6658d4dc495ac62f7977062b33bb15d1af6.tar.bz2 | |
clk: renesas: Remove usage of CLK_IS_BASIC
This flag doesn't look to be used by any code, just set in various clk
init structures and then never tested again. Remove it from these
drivers as it doesn't provide any benefit.
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: <linux-renesas-soc@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/renesas/r9a06g032-clocks.c')
| -rw-r--r-- | drivers/clk/renesas/r9a06g032-clocks.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index 6d2b56891559..658cb11b6f55 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -424,7 +424,7 @@ r9a06g032_register_gate(struct r9a06g032_priv *clocks, init.name = desc->name; init.ops = &r9a06g032_clk_gate_ops; - init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT; + init.flags = CLK_SET_RATE_PARENT; init.parent_names = parent_name ? &parent_name : NULL; init.num_parents = parent_name ? 1 : 0; @@ -595,7 +595,7 @@ r9a06g032_register_div(struct r9a06g032_priv *clocks, init.name = desc->name; init.ops = &r9a06g032_clk_div_ops; - init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT; + init.flags = CLK_SET_RATE_PARENT; init.parent_names = parent_name ? &parent_name : NULL; init.num_parents = parent_name ? 1 : 0; @@ -683,7 +683,7 @@ r9a06g032_register_bitsel(struct r9a06g032_priv *clocks, init.name = desc->name; init.ops = &clk_bitselect_ops; - init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT; + init.flags = CLK_SET_RATE_PARENT; init.parent_names = names; init.num_parents = 2; @@ -777,7 +777,7 @@ r9a06g032_register_dualgate(struct r9a06g032_priv *clocks, init.name = desc->name; init.ops = &r9a06g032_clk_dualgate_ops; - init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT; + init.flags = CLK_SET_RATE_PARENT; init.parent_names = &parent_name; init.num_parents = 1; g->hw.init = &init; |