diff options
| author | Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> | 2018-07-25 18:07:05 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-04-02 10:08:27 +0200 |
| commit | c2182095c850a02e150613ac026be99ce1c2ff9f (patch) | |
| tree | 4ca95281db9a8d23ac095e49a6d888fbcad08d80 /drivers/clk/renesas/r8a77965-cpg-mssr.c | |
| parent | 8d36fdcce21c1713eacf45380696f8cec3d724bf (diff) | |
| download | linux-c2182095c850a02e150613ac026be99ce1c2ff9f.tar.bz2 | |
clk: renesas: rcar-gen3: Correct parent clock of HS-USB
According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
Hardware Manual Rev. 0.61, the parent clock of the HS-USB module
clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[takeshi: Update R-Car H3, M3-N, and E3]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M and RZ/G2E]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/clk/renesas/r8a77965-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a77965-cpg-mssr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index ab25bd5f1371..48a9add7d4db 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -177,7 +177,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { DEF_MOD("ehci1", 702, R8A77965_CLK_S3D2), DEF_MOD("ehci0", 703, R8A77965_CLK_S3D2), - DEF_MOD("hsusb", 704, R8A77965_CLK_S3D4), + DEF_MOD("hsusb", 704, R8A77965_CLK_S3D2), DEF_MOD("csi20", 714, R8A77965_CLK_CSI0), DEF_MOD("csi40", 716, R8A77965_CLK_CSI0), DEF_MOD("du3", 721, R8A77965_CLK_S2D1), |