diff options
| author | Gilad Ben-Yossef <gilad@benyossef.com> | 2018-05-24 15:19:09 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-06-19 10:19:51 +0200 |
| commit | 46f3bb5fb944089aaa8130a80f5b7df877c58554 (patch) | |
| tree | 17e6ae794df5c9a7ec8676bdd99d66d4a59a307f /drivers/clk/renesas/r8a7795-cpg-mssr.c | |
| parent | 3d5155eaadaf512808cb57ec0c7db7bd4cc1ef67 (diff) | |
| download | linux-46f3bb5fb944089aaa8130a80f5b7df877c58554.tar.bz2 | |
clk: renesas: r8a7795: Add CCREE clock
This patch adds the clock used by the CryptoCell 630p instance in the
SoC.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/r8a7795-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index e5b186566c09..a85dd50e8911 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -133,6 +133,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S0D3), DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S0D3), DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S0D3), + DEF_MOD("sceg-pub", 229, R8A7795_CLK_CR), DEF_MOD("cmt3", 300, R8A7795_CLK_R), DEF_MOD("cmt2", 301, R8A7795_CLK_R), DEF_MOD("cmt1", 302, R8A7795_CLK_R), |