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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-08-25 12:20:46 +0100
committerStephen Boyd <sboyd@codeaurora.org>2016-08-25 13:02:20 -0700
commitce61966c05f276294b6be04d1765ad0d827ddefd (patch)
tree1e5478344ed6324c58d698ccc2f3ff842fac4f6b /drivers/clk/qcom
parent6d91f2c0141330b919ae4d13395f38c341469564 (diff)
downloadlinux-ce61966c05f276294b6be04d1765ad0d827ddefd.tar.bz2
clk: gcc-msm8996: Fix pcie 2 pipe register offset
This patch corrects the register offset for pcie2 pipe clock. Offset according to datasheet is 0x6e018 instead of 0x6e108. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom')
-rw-r--r--drivers/clk/qcom/gcc-msm8996.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 3afe42c9d611..2c367711feeb 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -2592,9 +2592,9 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
};
static struct clk_branch gcc_pcie_2_pipe_clk = {
- .halt_reg = 0x6e108,
+ .halt_reg = 0x6e018,
.clkr = {
- .enable_reg = 0x6e108,
+ .enable_reg = 0x6e018,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_pcie_2_pipe_clk",