diff options
| author | Rajendra Nayak <rnayak@codeaurora.org> | 2016-09-29 14:05:42 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-11-01 18:39:15 -0700 |
| commit | feb65645c1d259402eda6b45bd5c399a66826019 (patch) | |
| tree | e15c56efc5abf282cb652ae11a964c4714937755 /drivers/clk/qcom/clk-alpha-pll.h | |
| parent | a4315592e8bb89469ca110a89448446e6c72e3ea (diff) | |
| download | linux-feb65645c1d259402eda6b45bd5c399a66826019.tar.bz2 | |
clk: qcom: Add support for alpha pll hwfsm ops
Some PLLs can support an HW FSM mode (different from the Votable FSMs,
though its the same bit used to enable Votable FSMs as well as HW FSMs)
which enables the HW to do the bypass/reset/enable-output-ctrl sequence
on its own. So all thats needed from SW is to set the FSM_ENA bit.
PLL_ACTIVE_FLAG is whats used to check if the PLL is active/enabled.
Some of the PLLs which support HW FSM can also need an OFFLINE request
that needs to be toggled across the enable/disable. We use a flag to
identify such cases and handle them.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/clk-alpha-pll.h')
| -rw-r--r-- | drivers/clk/qcom/clk-alpha-pll.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index 90ce2016e1a0..0deb286da7e3 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -34,6 +34,8 @@ struct clk_alpha_pll { const struct pll_vco *vco_table; size_t num_vco; +#define SUPPORTS_OFFLINE_REQ BIT(0) + u8 flags; struct clk_regmap clkr; }; @@ -52,6 +54,7 @@ struct clk_alpha_pll_postdiv { }; extern const struct clk_ops clk_alpha_pll_ops; +extern const struct clk_ops clk_alpha_pll_hwfsm_ops; extern const struct clk_ops clk_alpha_pll_postdiv_ops; #endif |