diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-01-18 09:41:55 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-02-08 09:46:23 -0800 |
| commit | 5a5223ffd7ef721b59be38e2ce83e0a73dbb8942 (patch) | |
| tree | 0ed78566736e4746cbbf53e3ac1e6e4aa5a68cc6 /drivers/clk/qcom/Makefile | |
| parent | ee778e069dd49cf476f3939d62f31346cf730080 (diff) | |
| download | linux-5a5223ffd7ef721b59be38e2ce83e0a73dbb8942.tar.bz2 | |
clk: qcom: Add A7 PLL support
Add support for PLL found in Qualcomm SDX55 platforms which is used to
provide clock to the Cortex A7 CPU via a mux. This PLL can provide high
frequency clock to the CPU above 1GHz as compared to the other sources
like GPLL0.
In this driver, the power domain is attached to the cpudev. This is
required for CPUFreq functionality and there seems to be no better place
to do other than this driver (no dedicated CPUFreq driver).
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/Makefile')
| -rw-r--r-- | drivers/clk/qcom/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index 9e5e0e3cb7b4..e7e0ac382176 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o obj-$(CONFIG_MSM_MMCC_8998) += mmcc-msm8998.o obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o +obj-$(CONFIG_QCOM_A7PLL) += a7-pll.o obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o obj-$(CONFIG_QCOM_CLK_APCC_MSM8996) += clk-cpu-8996.o obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o |