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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2021-01-18 09:41:55 +0530
committerStephen Boyd <sboyd@kernel.org>2021-02-08 09:46:23 -0800
commit5a5223ffd7ef721b59be38e2ce83e0a73dbb8942 (patch)
tree0ed78566736e4746cbbf53e3ac1e6e4aa5a68cc6 /drivers/clk/qcom/Kconfig
parentee778e069dd49cf476f3939d62f31346cf730080 (diff)
downloadlinux-5a5223ffd7ef721b59be38e2ce83e0a73dbb8942.tar.bz2
clk: qcom: Add A7 PLL support
Add support for PLL found in Qualcomm SDX55 platforms which is used to provide clock to the Cortex A7 CPU via a mux. This PLL can provide high frequency clock to the CPU above 1GHz as compared to the other sources like GPLL0. In this driver, the power domain is attached to the cpudev. This is required for CPUFreq functionality and there seems to be no better place to do other than this driver (no dedicated CPUFreq driver). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118041156.50016-5-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/Kconfig')
-rw-r--r--drivers/clk/qcom/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index d32bb12cd8d0..d6f4aee4427a 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -28,6 +28,14 @@ config QCOM_A53PLL
Say Y if you want to support higher CPU frequencies on MSM8916
devices.
+config QCOM_A7PLL
+ tristate "SDX55 A7 PLL"
+ help
+ Support for the A7 PLL on SDX55 devices. It provides the CPU with
+ frequencies above 1GHz.
+ Say Y if you want to support higher CPU frequencies on SDX55
+ devices.
+
config QCOM_CLK_APCS_MSM8916
tristate "MSM8916 APCS Clock Controller"
depends on QCOM_APCS_IPC || COMPILE_TEST