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author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-12-26 20:12:24 +0100 |
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committer | Jerome Brunet <jbrunet@baylibre.com> | 2020-01-07 11:31:47 +0100 |
commit | 64c76b31774db5a0c0ce8df13aef618912136e32 (patch) | |
tree | 4a558c4f24fd9baa0148e05a231d10cd06294c5c /drivers/clk/meson | |
parent | 8daeaea99caabe24a0929fac17977ebfb882fa86 (diff) | |
download | linux-64c76b31774db5a0c0ce8df13aef618912136e32.tar.bz2 |
clk: clarify that clk_set_rate() does updates from top to bottom
clk_set_rate() currently starts updating the rate for a clock at the
top-most affected clock and then walks down the tree to update the
bottom-most affected clock last.
This behavior is important for protected clocks where we can switch
between multiple parents to achieve the same output.
An example for this is the mali clock tree on Amlogic SoCs:
mali_0_mux (must not change when enabled)
mali_0_div (must not change when enabled)
mali_0 (gate)
mali_1_mux (must not change when enabled)
mali_1_div (must not change when enabled)
mali_1 (gate)
The final output can either use mali_0_gate or mali_1. To change the
final output we must switch to the "inactive" tree. Assuming mali_0 is
active, then we need to prepare mali_1 with the new desired rate and
finally switch the output to the mali_1 tree. This process will then
protect the mali_1 tree and at the same time unprotect the mali_0 tree.
The next call to clk_set_rate() will then switch from the mali_1 tree
back to mali_0.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson')
0 files changed, 0 insertions, 0 deletions