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authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>2020-03-09 18:17:09 +0200
committerShawn Guo <shawnguo@kernel.org>2020-03-16 08:56:59 +0800
commit4ae9afbaaeb9bd939ac2bb8d53828fdebca5ec1b (patch)
tree4475197f8836703502be11c2d8a60bd4772801e4 /drivers/clk/imx/clk-pll14xx.c
parentb4fc6f72ddc1d4a53d3367b2d473e39d5d07a083 (diff)
downloadlinux-4ae9afbaaeb9bd939ac2bb8d53828fdebca5ec1b.tar.bz2
clk: imx7d: Add PXP clock
The PXP has a single CCGR clock gate, gating both the IPG_CLK_ROOT and the MAIN_AXI_CLK_ROOT. Add a single clock to cover both. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-pll14xx.c')
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