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| author | Zhichang Yuan <yuanzhichang@hisilicon.com> | 2018-03-21 17:23:02 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-04-04 08:42:48 -0500 |
| commit | adf38bb0b5956ab5469acb1ca981a9287c7ad1d8 (patch) | |
| tree | c08d2e7f88c69883ae7aff65647e0c9d9589e928 /drivers/bus/Kconfig | |
| parent | 65af618d2c559f8eb19d80d03a23029651a59de4 (diff) | |
| download | linux-adf38bb0b5956ab5469acb1ca981a9287c7ad1d8.tar.bz2 | |
HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings
The low-pin-count (LPC) interface of Hip06/Hip07 accesses I/O port space of
peripherals.
Implement the LPC host controller driver which performs the I/O operations
on the underlying hardware. We don't want to touch existing drivers such
as ipmi-bt, so this driver applies the indirect-IO introduced in the
previous patch after registering an indirect-IO node to the indirect-IO
devices list which will be searched by the I/O accessors to retrieve the
host-local I/O port.
The driver config is set as a bool instead of a tristate. The reason here
is that, by the very nature of the driver providing a logical PIO range, it
does not make sense to have this driver as a loadable module. Another more
specific reason is that the Huawei D03 board which includes Hip06 SoC
requires the LPC bus for UART console, so should be built in.
Tested-by: dann frazier <dann.frazier@canonical.com>
Signed-off-by: Zou Rongrong <zourongrong@huawei.com>
Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Rob Herring <robh@kernel.org> # dts part
Diffstat (limited to 'drivers/bus/Kconfig')
| -rw-r--r-- | drivers/bus/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 57e011d36a79..a3fad0f0292f 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -65,6 +65,14 @@ config BRCMSTB_GISB_ARB arbiter. This driver provides timeout and target abort error handling and internal bus master decoding. +config HISILICON_LPC + bool "Support for ISA I/O space on HiSilicon Hip06/7" + depends on ARM64 && (ARCH_HISI || COMPILE_TEST) + select INDIRECT_PIO + help + Driver to enable I/O access to devices attached to the Low Pin + Count bus on the HiSilicon Hip06/7 SoC. + config IMX_WEIM bool "Freescale EIM DRIVER" depends on ARCH_MXC |