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| author | Raul E Rangel <rrangel@chromium.org> | 2019-06-17 14:10:12 -0600 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2019-06-18 13:38:06 +0200 |
| commit | 0f7b79a44e7d7dd3ef1f59758c1a341f217ff5e5 (patch) | |
| tree | d2bf3521e1dbefeacb9559f8613a461cec091a12 /drivers/block/swim3.c | |
| parent | 65dade6044079a5c206fd1803642ff420061417a (diff) | |
| download | linux-0f7b79a44e7d7dd3ef1f59758c1a341f217ff5e5.tar.bz2 | |
mmc: sdhci: sdhci-pci-o2micro: Correctly set bus width when tuning
The O2Micro controller only supports tuning at 4-bits. So the host driver
needs to change the bus width while tuning and then set it back when done.
There was a bug in the original implementation in that mmc->ios.bus_width
also wasn't updated. Thus setting the incorrect blocksize in
sdhci_send_tuning which results in a tuning failure.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Fixes: 0086fc217d5d7 ("mmc: sdhci: Add support for O2 hardware tuning")
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/block/swim3.c')
0 files changed, 0 insertions, 0 deletions