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| author | Jeffrey Hugo <jhugo@codeaurora.org> | 2018-12-03 09:13:43 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-03 09:57:28 -0800 |
| commit | 4f89f7b59a6ea17e81cff212c18a0b580ff5ff27 (patch) | |
| tree | b2856361a79a8d98eb0bc00bc6f58309bfe83cb8 /certs | |
| parent | 651022382c7f8da46cb4872a545ee1da6d097d2a (diff) | |
| download | linux-4f89f7b59a6ea17e81cff212c18a0b580ff5ff27.tar.bz2 | |
clk: qcom: Fix MSM8998 resets
The offsets for the defined BCR reset registers does not match the hardware
documentation. Update the values to match the hardware documentation.
Fixes: b5f5f525c547 (clk: qcom: Add MSM8998 Global Clock Control (GCC) driver)
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions